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authorAnton Blanchard <anton@samba.org>2015-07-02 14:44:06 +1000
committerAlexander Graf <agraf@suse.de>2015-09-20 22:48:39 +0200
commit6bb9a0a9ef9b9b1c2434a52d1c1d066ce179adf8 (patch)
tree17115d6cbced43ec786561b447a030cbf5177b7a /hw/intc/apic_common.c
parente7f08320f055e1093007b3f1d55b145d5f4daaa1 (diff)
downloadfocaccia-qemu-6bb9a0a9ef9b9b1c2434a52d1c1d066ce179adf8.tar.gz
focaccia-qemu-6bb9a0a9ef9b9b1c2434a52d1c1d066ce179adf8.zip
target-ppc: Fix SRR0 when taking unaligned exceptions
We are setting SRR0 to the instruction before the one causing the
unaligned exception. A quick testcase:

. = 0x100
.globl _start
_start:
	/* Cause a 0x600 */
	li	3,0x1
	stwcx.	3,0,3
1:	b	1b

. = 0x600
1:	b	1b

Built into something we can load as a BIOS image:

gcc -mbig -c test.S
ld -EB -Ttext 0x0 -o test test.o
objcopy -O binary test test.bin

Run with:

qemu-system-ppc64 -nographic -bios test.bin

Shows an incorrect SRR0 (points at the li):

SRR0 0000000000000100

With the patch we get the correct SRR0:

SRR0 0000000000000104

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw/intc/apic_common.c')
0 files changed, 0 insertions, 0 deletions