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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-07 22:33:22 +0100 |
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| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-13 19:58:54 +0100 |
| commit | df6adb68c1b1808f164c9ed8a04fe14d9c04e82c (patch) | |
| tree | 9ca6f70276d7e91c3f96e60d7e114e103ab41348 /hw/intc/arm_gic_common.c | |
| parent | ac70f9767cba3a5966f7eefc102fcda8b3c7d09e (diff) | |
| download | focaccia-qemu-df6adb68c1b1808f164c9ed8a04fe14d9c04e82c.tar.gz focaccia-qemu-df6adb68c1b1808f164c9ed8a04fe14d9c04e82c.zip | |
target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argument
Introduce cpu_supports_isa() which takes a CPUMIPSState argument, more useful at runtime when the CPU is created (no need to call the extensive object_class_by_name()). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201207215257.4004222-3-f4bug@amsat.org>
Diffstat (limited to 'hw/intc/arm_gic_common.c')
0 files changed, 0 insertions, 0 deletions