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| author | Peter Maydell <peter.maydell@linaro.org> | 2022-04-08 15:15:30 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-04-22 14:44:52 +0100 |
| commit | c6dd2f9950cb59f7a02d57dcefef4d982efc6c7e (patch) | |
| tree | 01033d2104ea83f2a4c231757456bffa7064a98f /hw/intc/arm_gicv3_redist.c | |
| parent | 3c64a42c0b3e3ca92ef1b9a9243bcee8b9a87c59 (diff) | |
| download | focaccia-qemu-c6dd2f9950cb59f7a02d57dcefef4d982efc6c7e.tar.gz focaccia-qemu-c6dd2f9950cb59f7a02d57dcefef4d982efc6c7e.zip | |
hw/intc/arm_gicv3_its: Implement VINVALL
The VINVALL command should cause any cached information in the ITS or redistributor for the specified vCPU to be dropped or otherwise made consistent with the in-memory LPI configuration tables. Here we implement the command and table parsing, leaving the redistributor part as a stub for the moment, as usual. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220408141550.1271295-22-peter.maydell@linaro.org
Diffstat (limited to 'hw/intc/arm_gicv3_redist.c')
| -rw-r--r-- | hw/intc/arm_gicv3_redist.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index dc25997d1f..7c75dd6f07 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -818,6 +818,11 @@ void gicv3_redist_mov_vlpi(GICv3CPUState *src, uint64_t src_vptaddr, */ } +void gicv3_redist_vinvall(GICv3CPUState *cs, uint64_t vptaddr) +{ + /* The redistributor handling will be added in a subsequent commit */ +} + void gicv3_redist_inv_vlpi(GICv3CPUState *cs, int irq, uint64_t vptaddr) { /* |