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| author | Peter Maydell <peter.maydell@linaro.org> | 2022-01-07 17:07:59 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-01-07 17:07:59 +0000 |
| commit | 437dc0ea982beb11cb9b4df82baf8aefe6af661c (patch) | |
| tree | d9f6d9349464f0b2475c8f5b48b4461e04a1ed4f /hw/intc/gicv3_internal.h | |
| parent | 257bb6501cda75e9ba0804cd5b45e17275928252 (diff) | |
| download | focaccia-qemu-437dc0ea982beb11cb9b4df82baf8aefe6af661c.tar.gz focaccia-qemu-437dc0ea982beb11cb9b4df82baf8aefe6af661c.zip | |
hw/intc/arm_gicv3_its: Use FIELD macros for CTEs
Use FIELD macros to handle CTEs, rather than ad-hoc mask-and-shift. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/intc/gicv3_internal.h')
| -rw-r--r-- | hw/intc/gicv3_internal.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 14e8ef68e0..1eeb99035d 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -403,7 +403,8 @@ FIELD(DTE, ITTADDR, 6, 44) * Valid = 1 bit, RDBase = 16 bits */ #define GITS_CTE_SIZE (0x8ULL) -#define GITS_CTE_RDBASE_PROCNUM_MASK MAKE_64BIT_MASK(1, RDBASE_PROCNUM_LENGTH) +FIELD(CTE, VALID, 0, 1) +FIELD(CTE, RDBASE, 1, RDBASE_PROCNUM_LENGTH) /* Special interrupt IDs */ #define INTID_SECURE 1020 |