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| author | Bin Meng <bin.meng@windriver.com> | 2020-09-03 18:40:19 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-09-09 15:54:19 -0700 |
| commit | b609b7e3199912e16ef3b0447823f21fed73597e (patch) | |
| tree | a4996e2869a356811e641d243f53347b26117106 /hw/intc/ibex_plic.c | |
| parent | 70eb9f9cd1c0b519b31df8ab08ee2198b0e16176 (diff) | |
| download | focaccia-qemu-b609b7e3199912e16ef3b0447823f21fed73597e.tar.gz focaccia-qemu-b609b7e3199912e16ef3b0447823f21fed73597e.zip | |
hw/riscv: Move sifive_uart model to hw/char
This is an effort to clean up the hw/riscv directory. Ideally it should only contain the RISC-V SoC / machine codes plus generic codes. Let's move sifive_uart model to hw/char directory. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1599129623-68957-9-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/intc/ibex_plic.c')
0 files changed, 0 insertions, 0 deletions