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authorDoug Brown <doug@schmorgal.com>2024-09-13 15:31:48 +0100
committerPeter Maydell <peter.maydell@linaro.org>2024-09-13 15:31:48 +0100
commit77dcbf16d971596261ddaa910f57ccceb48227b5 (patch)
tree711cb948c597e0127cf1b51f16ce649dee6a4881 /hw/intc/kvm_irqcount.c
parentcd1e485facbeae99452a534c5d26e48bb69d7ecd (diff)
downloadfocaccia-qemu-77dcbf16d971596261ddaa910f57ccceb48227b5.tar.gz
focaccia-qemu-77dcbf16d971596261ddaa910f57ccceb48227b5.zip
hw/net/can/xlnx-versal-canfd: Translate CAN ID registers
Previously the emulated CAN ID register was being set to the exact same
value stored in qemu_can_frame.can_id. This doesn't work correctly
because the Xilinx IP core uses a different bit arrangement than
qemu_can_frame for all of its ID registers. Correct this problem for
both RX and TX, including RX filtering.

Signed-off-by: Doug Brown <doug@schmorgal.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Acked-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Message-id: 20240827034927.66659-4-doug@schmorgal.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc/kvm_irqcount.c')
0 files changed, 0 insertions, 0 deletions