diff options
| author | Robert Hoo <robert.hu@linux.intel.com> | 2018-07-05 17:09:54 +0800 |
|---|---|---|
| committer | Eduardo Habkost <ehabkost@redhat.com> | 2018-08-16 13:43:01 -0300 |
| commit | 8c80c99fcceabd0708a5a83f08577e778c9419f5 (patch) | |
| tree | 19cddca7714a043daa216ad5dd0cc8f5754b08a3 /hw/intc/lm32_pic.c | |
| parent | 2544e9e4aa2bcef8ac069057a681a5ff37a23e49 (diff) | |
| download | focaccia-qemu-8c80c99fcceabd0708a5a83f08577e778c9419f5.tar.gz focaccia-qemu-8c80c99fcceabd0708a5a83f08577e778c9419f5.zip | |
i386: Add new MSR indices for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES
IA32_PRED_CMD MSR gives software a way to issue commands that affect the state of indirect branch predictors. Enumerated by CPUID.(EAX=7H,ECX=0):EDX[26]. IA32_ARCH_CAPABILITIES MSR enumerates architectural features of RDCL_NO and IBRS_ALL. Enumerated by CPUID.(EAX=07H, ECX=0):EDX[29]. https://software.intel.com/sites/default/files/managed/c5/63/336996-Speculative-Execution-Side-Channel-Mitigations.pdf Signed-off-by: Robert Hoo <robert.hu@linux.intel.com> Message-Id: <1530781798-183214-2-git-send-email-robert.hu@linux.intel.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'hw/intc/lm32_pic.c')
0 files changed, 0 insertions, 0 deletions