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| author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2023-09-25 14:56:53 -0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2023-10-12 11:57:46 +1000 |
| commit | 36c1118d500b95d26d1f07deb93402f9d596cabf (patch) | |
| tree | 74a3629e7c02b7e03805670cf87d406dc3604815 /hw/intc/m68k_irqc.c | |
| parent | 9dcecbd724ebadd8c957356e629aab9d724e9889 (diff) | |
| download | focaccia-qemu-36c1118d500b95d26d1f07deb93402f9d596cabf.tar.gz focaccia-qemu-36c1118d500b95d26d1f07deb93402f9d596cabf.zip | |
target/riscv: move riscv_cpu_validate_set_extensions() to tcg-cpu.c
This function is the core of the RISC-V validations for TCG CPUs, and it has a lot going on. Functions in cpu.c were made public to allow them to be used by the KVM accelerator class later on. 'cpu_cfg_ext_get_min_version()' is notably hard to move it to another file due to its dependency with isa_edata_arr[] array, thus make it public and use it as is for now. riscv_cpu_validate_set_extensions() is kept public because it's used by csr.c in write_misa(). Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20230925175709.35696-4-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/intc/m68k_irqc.c')
0 files changed, 0 insertions, 0 deletions