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| author | Sergey Makarov <s.makarov@syntacore.com> | 2024-09-18 17:02:28 +0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-10-30 11:22:07 +1000 |
| commit | 41fc1f02947dd7a33b2c1d0e8474744b12f2514e (patch) | |
| tree | d9407fb5f448e39c53c03eaac2168ff76649a419 /hw/intc/omap_intc.c | |
| parent | bfd12c92cc77a3def85c18157f5dbc198c062609 (diff) | |
| download | focaccia-qemu-41fc1f02947dd7a33b2c1d0e8474744b12f2514e.tar.gz focaccia-qemu-41fc1f02947dd7a33b2c1d0e8474744b12f2514e.zip | |
hw/intc: Make zeroth priority register read-only
According to PLIC specification chapter 4, zeroth priority register is reserved. Discard writes to this register. Signed-off-by: Sergey Makarov <s.makarov@syntacore.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20240918140229.124329-2-s.makarov@syntacore.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/intc/omap_intc.c')
0 files changed, 0 insertions, 0 deletions