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| author | Luc Michel <luc.michel@greensocs.com> | 2018-08-14 17:17:20 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-08-14 17:17:20 +0100 |
| commit | 439badd66d6f1bf82211f86131c7ce75d951756a (patch) | |
| tree | ae80a86e2dd17f260e645199df9a0bc28a1d7099 /hw/intc/omap_intc.c | |
| parent | a1d7b8d896f98139dff177508895e55caf483f95 (diff) | |
| download | focaccia-qemu-439badd66d6f1bf82211f86131c7ce75d951756a.tar.gz focaccia-qemu-439badd66d6f1bf82211f86131c7ce75d951756a.zip | |
intc/arm_gic: Implement virtualization extensions in gic_acknowledge_irq
Implement virtualization extensions in the gic_acknowledge_irq() function. This function changes the state of the highest priority IRQ from pending to active. When the current CPU is a vCPU, modifying the state of an IRQ modifies the corresponding LR entry. However if we clear the pending flag before setting the active one, we lose track of the LR entry as it becomes invalid. The next call to gic_get_lr_entry() will fail. To overcome this issue, we call gic_activate_irq() before gic_clear_pending(). This does not change the general behaviour of gic_acknowledge_irq. We also move the SGI case in gic_clear_pending_sgi() to enhance code readability as the virtualization extensions support adds a if-else level. Signed-off-by: Luc Michel <luc.michel@greensocs.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180727095421.386-12-luc.michel@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc/omap_intc.c')
0 files changed, 0 insertions, 0 deletions