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| author | Luc Michel <luc.michel@greensocs.com> | 2018-08-14 17:17:20 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-08-14 17:17:20 +0100 |
| commit | 527d296f5d236cd68de496d0cf1260fe3fe98ab5 (patch) | |
| tree | 5dafff4540b6c3f7253dd757307be0bc95b2743e /hw/intc/omap_intc.c | |
| parent | 2c679ac734892e2a61ba3d1a7d5146f638882532 (diff) | |
| download | focaccia-qemu-527d296f5d236cd68de496d0cf1260fe3fe98ab5.tar.gz focaccia-qemu-527d296f5d236cd68de496d0cf1260fe3fe98ab5.zip | |
intc/arm_gic: Implement the virtual interface registers
Implement the read and write functions for the virtual interface of the virtualization extensions in the GICv2. One mirror region per CPU is also created, which maps to that specific CPU id. This is required by the GIC architecture specification. Signed-off-by: Luc Michel <luc.michel@greensocs.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180727095421.386-16-luc.michel@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc/omap_intc.c')
0 files changed, 0 insertions, 0 deletions