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| author | Fabiano Rosas <farosas@linux.ibm.com> | 2022-01-28 13:15:06 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-01-28 13:15:06 +0100 |
| commit | 67baff7715b3c1a2beb7df7af615eb3f132b9d13 (patch) | |
| tree | b83159c1f893c0fb2099959487ff0df53e10f0dc /hw/intc/ompic.c | |
| parent | 58a02119f39581409444c31e04d6b8b2c15e6f8e (diff) | |
| download | focaccia-qemu-67baff7715b3c1a2beb7df7af615eb3f132b9d13.tar.gz focaccia-qemu-67baff7715b3c1a2beb7df7af615eb3f132b9d13.zip | |
target/ppc: books: External interrupt cleanup
Since this is now BookS only, we can simplify the code a bit and check has_hv_mode instead of enumerating the exception models. LPES0 does not make sense if there is no MSR_HV. Note that QEMU does not support HV mode on 970 and POWER5+ so we don't set MSR_HV in msr_mask. Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220124184605.999353-5-farosas@linux.ibm.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'hw/intc/ompic.c')
0 files changed, 0 insertions, 0 deletions