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| author | Mayuresh Chitale <mchitale@ventanamicro.com> | 2023-03-03 12:20:55 +0530 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-03-05 15:33:40 -0800 |
| commit | 64452a09c5e37853b4f0a777805831fb87fb2c23 (patch) | |
| tree | a2dd0e10af8d99b5a5c49b769d7b2c8b62cb6e54 /hw/intc/riscv_aplic.c | |
| parent | f1bd6f8ef6a47de7c10c8d94f526cc10b7d25c4d (diff) | |
| download | focaccia-qemu-64452a09c5e37853b4f0a777805831fb87fb2c23.tar.gz focaccia-qemu-64452a09c5e37853b4f0a777805831fb87fb2c23.zip | |
hw: intc: Use cpu_by_arch_id to fetch CPU state
Qemu_get_cpu uses the logical CPU id assigned during init to fetch the CPU state. However APLIC, IMSIC and ACLINT contain registers and states which are specific to physical hart Ids. The hart Ids in any given system might be sparse and hence calls to qemu_get_cpu need to be replaced by cpu_by_arch_id which performs lookup based on the sparse physical hart IDs. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20230303065055.915652-3-mchitale@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'hw/intc/riscv_aplic.c')
| -rw-r--r-- | hw/intc/riscv_aplic.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c index cfd007e629..cd7efc4ad4 100644 --- a/hw/intc/riscv_aplic.c +++ b/hw/intc/riscv_aplic.c @@ -833,7 +833,7 @@ static void riscv_aplic_realize(DeviceState *dev, Error **errp) /* Claim the CPU interrupt to be triggered by this APLIC */ for (i = 0; i < aplic->num_harts; i++) { - RISCVCPU *cpu = RISCV_CPU(qemu_get_cpu(aplic->hartid_base + i)); + RISCVCPU *cpu = RISCV_CPU(cpu_by_arch_id(aplic->hartid_base + i)); if (riscv_cpu_claim_interrupts(cpu, (aplic->mmode) ? MIP_MEIP : MIP_SEIP) < 0) { error_report("%s already claimed", @@ -966,7 +966,7 @@ DeviceState *riscv_aplic_create(hwaddr addr, hwaddr size, if (!msimode) { for (i = 0; i < num_harts; i++) { - CPUState *cpu = qemu_get_cpu(hartid_base + i); + CPUState *cpu = cpu_by_arch_id(hartid_base + i); qdev_connect_gpio_out_named(dev, NULL, i, qdev_get_gpio_in(DEVICE(cpu), |