summary refs log tree commit diff stats
path: root/hw/intc/xics.c
diff options
context:
space:
mode:
authorCédric Le Goater <clg@kaod.org>2018-06-25 11:17:16 +0200
committerDavid Gibson <david@gibson.dropbear.id.au>2018-07-03 09:56:51 +1000
commiteeefd43b3cf342d1696128462a16e092995ff1b5 (patch)
tree9a4542c58c2406d5744d37d2a5075b732dd518b7 /hw/intc/xics.c
parent815049a01ba187d48166f0144356bc640d4e5803 (diff)
downloadfocaccia-qemu-eeefd43b3cf342d1696128462a16e092995ff1b5.tar.gz
focaccia-qemu-eeefd43b3cf342d1696128462a16e092995ff1b5.zip
ppx/xics: introduce a parent_reset in ICSStateClass
Just like for the realize handlers, this makes possible to move the
common ICSState code of the reset handlers in the ics-base class.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/intc/xics.c')
-rw-r--r--hw/intc/xics.c45
1 files changed, 30 insertions, 15 deletions
diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index 83340770f7..8cfe223153 100644
--- a/hw/intc/xics.c
+++ b/hw/intc/xics.c
@@ -537,23 +537,16 @@ static void ics_simple_eoi(ICSState *ics, uint32_t nr)
     }
 }
 
-static void ics_simple_reset(void *dev)
+static void ics_simple_reset(DeviceState *dev)
 {
-    ICSState *ics = ICS_SIMPLE(dev);
-    int i;
-    uint8_t flags[ics->nr_irqs];
+    ICSStateClass *icsc = ICS_BASE_GET_CLASS(dev);
 
-    for (i = 0; i < ics->nr_irqs; i++) {
-        flags[i] = ics->irqs[i].flags;
-    }
-
-    memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
+    icsc->parent_reset(dev);
+}
 
-    for (i = 0; i < ics->nr_irqs; i++) {
-        ics->irqs[i].priority = 0xff;
-        ics->irqs[i].saved_priority = 0xff;
-        ics->irqs[i].flags = flags[i];
-    }
+static void ics_simple_reset_handler(void *dev)
+{
+    ics_simple_reset(dev);
 }
 
 static int ics_simple_dispatch_pre_save(void *opaque)
@@ -625,7 +618,7 @@ static void ics_simple_realize(DeviceState *dev, Error **errp)
 
     ics->qirqs = qemu_allocate_irqs(ics_simple_set_irq, ics, ics->nr_irqs);
 
-    qemu_register_reset(ics_simple_reset, ics);
+    qemu_register_reset(ics_simple_reset_handler, ics);
 }
 
 static void ics_simple_class_init(ObjectClass *klass, void *data)
@@ -635,6 +628,8 @@ static void ics_simple_class_init(ObjectClass *klass, void *data)
 
     device_class_set_parent_realize(dc, ics_simple_realize,
                                     &isc->parent_realize);
+    device_class_set_parent_reset(dc, ics_simple_reset,
+                                  &isc->parent_reset);
 
     dc->vmsd = &vmstate_ics_simple;
     isc->reject = ics_simple_reject;
@@ -650,6 +645,25 @@ static const TypeInfo ics_simple_info = {
     .class_size = sizeof(ICSStateClass),
 };
 
+static void ics_base_reset(DeviceState *dev)
+{
+    ICSState *ics = ICS_BASE(dev);
+    int i;
+    uint8_t flags[ics->nr_irqs];
+
+    for (i = 0; i < ics->nr_irqs; i++) {
+        flags[i] = ics->irqs[i].flags;
+    }
+
+    memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
+
+    for (i = 0; i < ics->nr_irqs; i++) {
+        ics->irqs[i].priority = 0xff;
+        ics->irqs[i].saved_priority = 0xff;
+        ics->irqs[i].flags = flags[i];
+    }
+}
+
 static void ics_base_realize(DeviceState *dev, Error **errp)
 {
     ICSState *ics = ICS_BASE(dev);
@@ -689,6 +703,7 @@ static void ics_base_class_init(ObjectClass *klass, void *data)
 
     dc->realize = ics_base_realize;
     dc->props = ics_base_properties;
+    dc->reset = ics_base_reset;
 }
 
 static const TypeInfo ics_base_info = {