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| author | Cédric Le Goater <clg@kaod.org> | 2017-03-03 13:51:03 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2017-03-06 10:07:38 +1100 |
| commit | 7ea6e0671754330510bcdde2e7f5b5f2db426472 (patch) | |
| tree | c53a959c7e1b042436455af29276527d469cde7d /hw/intc/xics_kvm.c | |
| parent | 17783ac828adc694d986698d2d7014aedfeb48c6 (diff) | |
| download | focaccia-qemu-7ea6e0671754330510bcdde2e7f5b5f2db426472.tar.gz focaccia-qemu-7ea6e0671754330510bcdde2e7f5b5f2db426472.zip | |
ppc/xics: register reset handlers for the ICP and ICS objects
The recent changes on the XICS layer removed the XICSState object to let the sPAPR machine handle the ICP and ICS directly. The reset of these objects was previously handled by XICSState, which was a SysBus device, and to keep the same behavior, the ICP and ICS were assigned to SysbBus. But that broke the 'info qtree' command in the monitor. 'qtree' performs a loop on the children of a bus to print their properties and SysBus devices are expected to be found under SysBus, which is not the case anymore. The fix for this problem is to register reset handlers for the ICP and ICS objects and stop using SysBus for such devices. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/intc/xics_kvm.c')
| -rw-r--r-- | hw/intc/xics_kvm.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c index 0a3daca3bb..42e0e0ef84 100644 --- a/hw/intc/xics_kvm.c +++ b/hw/intc/xics_kvm.c @@ -102,7 +102,7 @@ static int icp_set_kvm_state(ICPState *icp, int version_id) return 0; } -static void icp_kvm_reset(DeviceState *dev) +static void icp_kvm_reset(void *dev) { ICPState *icp = ICP(dev); @@ -146,12 +146,17 @@ static void icp_kvm_cpu_setup(ICPState *icp, PowerPCCPU *cpu) icp->cap_irq_xics_enabled = true; } +static void icp_kvm_realize(DeviceState *dev, Error **errp) +{ + qemu_register_reset(icp_kvm_reset, dev); +} + static void icp_kvm_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); ICPStateClass *icpc = ICP_CLASS(klass); - dc->reset = icp_kvm_reset; + dc->realize = icp_kvm_realize; icpc->pre_save = icp_get_kvm_state; icpc->post_load = icp_set_kvm_state; icpc->cpu_setup = icp_kvm_cpu_setup; @@ -293,7 +298,7 @@ static void ics_kvm_set_irq(void *opaque, int srcno, int val) } } -static void ics_kvm_reset(DeviceState *dev) +static void ics_kvm_reset(void *dev) { ICSState *ics = ICS_SIMPLE(dev); int i; @@ -324,15 +329,15 @@ static void ics_kvm_realize(DeviceState *dev, Error **errp) } ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState)); ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs); + + qemu_register_reset(ics_kvm_reset, dev); } static void ics_kvm_class_init(ObjectClass *klass, void *data) { - DeviceClass *dc = DEVICE_CLASS(klass); ICSStateClass *icsc = ICS_BASE_CLASS(klass); icsc->realize = ics_kvm_realize; - dc->reset = ics_kvm_reset; icsc->pre_save = ics_get_kvm_state; icsc->post_load = ics_set_kvm_state; } |