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| author | Glenn Miles <milesg@linux.ibm.com> | 2025-05-12 13:10:33 +1000 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2025-07-21 08:03:52 +0200 |
| commit | 1a0cd94252bf111b0ace7b9cd88258e837d95ea4 (patch) | |
| tree | 2a9140ac472180c4a3ece2f139104ebd6eddb3b3 /hw/intc/xive2.c | |
| parent | 701ab1857a9175a86e3ad6f18958df631af86a62 (diff) | |
| download | focaccia-qemu-1a0cd94252bf111b0ace7b9cd88258e837d95ea4.tar.gz focaccia-qemu-1a0cd94252bf111b0ace7b9cd88258e837d95ea4.zip | |
ppc/xive2: Improve pool regs variable name
Change pregs to pool_regs, for clarity. [npiggin: split from larger patch] Signed-off-by: Glenn Miles <milesg@linux.ibm.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Michael Kowal <kowal@linux.ibm.com> Tested-by: Gautam Menghani <gautam@linux.ibm.com> Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-25-npiggin@gmail.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'hw/intc/xive2.c')
| -rw-r--r-- | hw/intc/xive2.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index f810e716de..1f4713dabe 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -1044,13 +1044,12 @@ again: /* PHYS updates also depend on POOL values */ if (ring == TM_QW3_HV_PHYS) { - uint8_t *pregs = &tctx->regs[TM_QW2_HV_POOL]; + uint8_t *pool_regs = &tctx->regs[TM_QW2_HV_POOL]; /* POOL values only matter if POOL ctx is valid */ - if (pregs[TM_WORD2] & 0x80) { - - uint8_t pool_pipr = xive_ipb_to_pipr(pregs[TM_IPB]); - uint8_t pool_lsmfb = pregs[TM_LSMFB]; + if (pool_regs[TM_WORD2] & 0x80) { + uint8_t pool_pipr = xive_ipb_to_pipr(pool_regs[TM_IPB]); + uint8_t pool_lsmfb = pool_regs[TM_LSMFB]; /* * Determine highest priority interrupt and @@ -1064,7 +1063,7 @@ again: } /* Values needed for group priority calculation */ - if (pregs[TM_LGS] && (pool_lsmfb < lsmfb_min)) { + if (pool_regs[TM_LGS] && (pool_lsmfb < lsmfb_min)) { group_enabled = true; lsmfb_min = pool_lsmfb; if (lsmfb_min < pipr_min) { |