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| author | Glenn Miles <milesg@linux.ibm.com> | 2025-05-12 13:10:19 +1000 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2025-07-21 08:03:52 +0200 |
| commit | d4720a7faf4bb415f3fe7f10e5c888212b81316a (patch) | |
| tree | fa1df9d01ba29dcc722aaad2637daddd92f121ab /hw/intc/xive2.c | |
| parent | 8d373176181fbc11f8d8eae2b4532b867f083ea6 (diff) | |
| download | focaccia-qemu-d4720a7faf4bb415f3fe7f10e5c888212b81316a.tar.gz focaccia-qemu-d4720a7faf4bb415f3fe7f10e5c888212b81316a.zip | |
ppc/xive2: Fix treatment of PIPR in CPPR update
According to the XIVE spec, updating the CPPR should also update the PIPR. The final value of the PIPR depends on other factors, but it should never be set to a value that is above the CPPR. Also added support for redistributing an active group interrupt when it is precluded as a result of changing the CPPR value. Signed-off-by: Glenn Miles <milesg@linux.ibm.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Michael Kowal <kowal@linux.ibm.com> Reviewed-by: Caleb Schlossin <calebs@linux.ibm.com> Tested-by: Gautam Menghani <gautam@linux.ibm.com> Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-11-npiggin@gmail.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'hw/intc/xive2.c')
| -rw-r--r-- | hw/intc/xive2.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index 36e842f041..c23933f8f5 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -995,7 +995,9 @@ static void xive2_tctx_set_cppr(XiveTCTX *tctx, uint8_t ring, uint8_t cppr) } } } - regs[TM_PIPR] = pipr_min; + + /* PIPR should not be set to a value greater than CPPR */ + regs[TM_PIPR] = (pipr_min > cppr) ? cppr : pipr_min; rc = xive2_tctx_get_nvp_indexes(tctx, ring_min, &nvp_blk, &nvp_idx); if (rc) { |