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| author | Song Gao <gaosong@loongson.cn> | 2025-09-16 20:21:06 +0800 |
|---|---|---|
| committer | Song Gao <gaosong@loongson.cn> | 2025-09-28 17:31:04 +0800 |
| commit | 0d148eaf5a3eb14469b536e37bb1936fd0085f03 (patch) | |
| tree | eda111efe575840ef793275e08aa69a19f0f51d0 /hw/intc | |
| parent | 386aef3e4a7fbfb8c051f8c24832492288fe6185 (diff) | |
| download | focaccia-qemu-0d148eaf5a3eb14469b536e37bb1936fd0085f03.tar.gz focaccia-qemu-0d148eaf5a3eb14469b536e37bb1936fd0085f03.zip | |
hw/loongarch: Implement dintc set irq
Implement dintc set irq and update CSR_MSGIS. Reviewed-by: Bibo Mao <maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-ID: <20250916122109.749813-9-gaosong@loongson.cn>
Diffstat (limited to 'hw/intc')
| -rw-r--r-- | hw/intc/loongarch_dintc.c | 32 |
1 files changed, 30 insertions, 2 deletions
diff --git a/hw/intc/loongarch_dintc.c b/hw/intc/loongarch_dintc.c index 598c666ec6..962fe10bf8 100644 --- a/hw/intc/loongarch_dintc.c +++ b/hw/intc/loongarch_dintc.c @@ -16,6 +16,14 @@ #include "migration/vmstate.h" #include "trace.h" #include "hw/qdev-properties.h" +#include "target/loongarch/cpu.h" +#include "qemu/error-report.h" +#include "system/hw_accel.h" + +/* msg addr field */ +FIELD(MSG_ADDR, IRQ_NUM, 4, 8) +FIELD(MSG_ADDR, CPU_NUM, 12, 8) +FIELD(MSG_ADDR, FIX, 28, 12) static uint64_t loongarch_dintc_mem_read(void *opaque, hwaddr addr, unsigned size) @@ -23,13 +31,33 @@ static uint64_t loongarch_dintc_mem_read(void *opaque, return 0; } +static void do_set_vcpu_dintc_irq(CPUState *cs, run_on_cpu_data data) +{ + int irq = data.host_int; + CPULoongArchState *env; + + env = &LOONGARCH_CPU(cs)->env; + cpu_synchronize_state(cs); + set_bit(irq, (unsigned long *)&env->CSR_MSGIS); +} + static void loongarch_dintc_mem_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { - return; + int irq_num, cpu_num = 0; + LoongArchDINTCState *s = LOONGARCH_DINTC(opaque); + uint64_t msg_addr = addr + VIRT_DINTC_BASE; + CPUState *cs; + + cpu_num = FIELD_EX64(msg_addr, MSG_ADDR, CPU_NUM); + cs = cpu_by_arch_id(cpu_num); + irq_num = FIELD_EX64(msg_addr, MSG_ADDR, IRQ_NUM); + + async_run_on_cpu(cs, do_set_vcpu_dintc_irq, + RUN_ON_CPU_HOST_INT(irq_num)); + qemu_set_irq(s->cpu[cpu_num].parent_irq, 1); } - static const MemoryRegionOps loongarch_dintc_ops = { .read = loongarch_dintc_mem_read, .write = loongarch_dintc_mem_write, |