diff options
| author | Bibo Mao <maobibo@loongson.cn> | 2024-07-17 23:32:49 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2024-08-06 10:22:52 +0200 |
| commit | 3fad6db79e892c1e19a8b6b354284f183ed0432c (patch) | |
| tree | 55a156fb582ab06a88389521e7cdc8ddd07c40e3 /hw/intc | |
| parent | ef2f11454cc6644d2fb68f67e707bc637036d006 (diff) | |
| download | focaccia-qemu-3fad6db79e892c1e19a8b6b354284f183ed0432c.tar.gz focaccia-qemu-3fad6db79e892c1e19a8b6b354284f183ed0432c.zip | |
hw/intc/loongson_ipi: Restrict to MIPS
Now than LoongArch target can use the TYPE_LOONGARCH_IPI model, restrict TYPE_LOONGSON_IPI to MIPS. Signed-off-by: Bibo Mao <maobibo@loongson.cn> [PMD: Extracted from bigger commit, added commit description] Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Tested-by: Bibo Mao <maobibo@loongson.cn> Acked-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <20240805180622.21001-15-philmd@linaro.org>
Diffstat (limited to 'hw/intc')
| -rw-r--r-- | hw/intc/loongson_ipi.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index 0b88ae3230..8382ceca67 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -16,22 +16,9 @@ #include "exec/address-spaces.h" #include "exec/memory.h" #include "migration/vmstate.h" -#ifdef TARGET_LOONGARCH64 -#include "target/loongarch/cpu.h" -#endif -#ifdef TARGET_MIPS #include "target/mips/cpu.h" -#endif #include "trace.h" -#ifdef TARGET_LOONGARCH64 -static AddressSpace *get_iocsr_as(CPUState *cpu) -{ - return LOONGARCH_CPU(cpu)->env.address_space_iocsr; -} -#endif - -#ifdef TARGET_MIPS static AddressSpace *get_iocsr_as(CPUState *cpu) { if (ase_lcsr_available(&MIPS_CPU(cpu)->env)) { @@ -40,7 +27,6 @@ static AddressSpace *get_iocsr_as(CPUState *cpu) return NULL; } -#endif static const MemoryRegionOps loongson_ipi_core_ops = { .read_with_attrs = loongson_ipi_core_readl, |