summary refs log tree commit diff stats
path: root/hw/intc
diff options
context:
space:
mode:
authorPaolo Bonzini <pbonzini@redhat.com>2014-11-11 13:14:05 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2014-11-24 14:37:30 +0100
commit60e68042cf70f271308dc6b4b22b609d054af929 (patch)
treeeed82dc3faa251f48d8295d025883ad6d3e2c256 /hw/intc
parent0e88f478508b566152c6681f4889ed9830a2c0a5 (diff)
downloadfocaccia-qemu-60e68042cf70f271308dc6b4b22b609d054af929.tar.gz
focaccia-qemu-60e68042cf70f271308dc6b4b22b609d054af929.zip
apic: avoid getting out of halted state on masked PIC interrupts
After the next patch, if a masked PIC interrupts causes CPU_INTERRUPT_POLL
to be set, the CPU will spuriously get out of halted state.  While this
is technically valid, we should avoid that.

Make CPU_INTERRUPT_POLL run apic_update_irq in the right thread and then
look at CPU_INTERRUPT_HARD.  If CPU_INTERRUPT_HARD does not get set,
do not report the CPU as having work.

Also move the handling of software-disabled APIC from apic_update_irq
to apic_irq_pending, and always trigger CPU_INTERRUPT_POLL.  This will
be important once we will add a case that resets CPU_INTERRUPT_HARD
from apic_update_irq.  We want to run it even if we go through
CPU_INTERRUPT_POLL, and even if the local APIC is software disabled.

Reported-by: Richard Bilson <rbilson@qnx.com>
Tested-by: Richard Bilson <rbilson@qnx.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/intc')
-rw-r--r--hw/intc/apic.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index 03ff9e94f2..0653409ed0 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -349,6 +349,11 @@ static int apic_get_arb_pri(APICCommonState *s)
 static int apic_irq_pending(APICCommonState *s)
 {
     int irrv, ppr;
+
+    if (!(s->spurious_vec & APIC_SV_ENABLE)) {
+        return 0;
+    }
+
     irrv = get_highest_priority_int(s->irr);
     if (irrv < 0) {
         return 0;
@@ -366,9 +371,6 @@ static void apic_update_irq(APICCommonState *s)
 {
     CPUState *cpu;
 
-    if (!(s->spurious_vec & APIC_SV_ENABLE)) {
-        return;
-    }
     cpu = CPU(s->cpu);
     if (!qemu_cpu_is_self(cpu)) {
         cpu_interrupt(cpu, CPU_INTERRUPT_POLL);