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| author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2023-09-25 14:56:55 -0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2023-10-12 12:00:09 +1000 |
| commit | 977bbb04525682fd7a2ed8d28c0590bc2873db06 (patch) | |
| tree | 12f7a767e853dffbad53da6becb9386c0403e443 /hw/intc | |
| parent | e7443334a87b1cc43d20daacd72db44b530b7a28 (diff) | |
| download | focaccia-qemu-977bbb04525682fd7a2ed8d28c0590bc2873db06.tar.gz focaccia-qemu-977bbb04525682fd7a2ed8d28c0590bc2873db06.zip | |
target/riscv/cpu.c: add .instance_post_init()
All generic CPUs call riscv_cpu_add_user_properties(). The 'max' CPU calls riscv_init_max_cpu_extensions(). Both can be moved to a common instance_post_init() callback, implemented in riscv_cpu_post_init(), called by all CPUs. The call order then becomes: riscv_cpu_init() -> cpu_init() of each CPU -> .instance_post_init() In the near future riscv_cpu_post_init() will call the init() function of the current accelerator, providing a hook for KVM and TCG accel classes to change the init() process of the CPU. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20230925175709.35696-6-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/intc')
0 files changed, 0 insertions, 0 deletions