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authorPeter Maydell <peter.maydell@linaro.org>2018-07-23 16:15:24 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-07-23 16:15:24 +0100
commite596be90393389405c96a5c9534c4c4e2e0b5675 (patch)
tree0c77502f86cbfc16e3fbd15ea47f0c73f7b4b397 /hw/intc
parent9ba7dd14355bb7957680d5ef764471ab102df099 (diff)
parent1ddc9b98c3cb89fe23a55ba924000fd645253e87 (diff)
downloadfocaccia-qemu-e596be90393389405c96a5c9534c4c4e2e0b5675.tar.gz
focaccia-qemu-e596be90393389405c96a5c9534c4c4e2e0b5675.zip
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180723' into staging
target-arm queue:
 * spitz, exynos: fix bugs when introspecting some devices
 * hw/microblaze/xlnx-zynqmp-pmu: Fix introspection problem in 'xlnx, zynqmp-pmu-soc'
 * target/arm: Correctly handle overlapping small MPU regions
 * hw/sd/bcm2835_sdhost: Fix PIO mode writes

# gpg: Signature made Mon 23 Jul 2018 15:40:09 BST
# gpg:                using RSA key 3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20180723:
  hw/intc/exynos4210_gic: Turn instance_init into realize function
  hw/arm/spitz: Move problematic nand_init() code to realize function
  target/arm: Correctly handle overlapping small MPU regions
  hw/sd/bcm2835_sdhost: Fix PIO mode writes
  hw/microblaze/xlnx-zynqmp-pmu: Fix introspection problem in 'xlnx, zynqmp-pmu-soc'

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc')
-rw-r--r--hw/intc/exynos4210_gic.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c
index b6b00a4f58..69f9c18d73 100644
--- a/hw/intc/exynos4210_gic.c
+++ b/hw/intc/exynos4210_gic.c
@@ -281,9 +281,9 @@ static void exynos4210_gic_set_irq(void *opaque, int irq, int level)
     qemu_set_irq(qdev_get_gpio_in(s->gic, irq), level);
 }
 
-static void exynos4210_gic_init(Object *obj)
+static void exynos4210_gic_realize(DeviceState *dev, Error **errp)
 {
-    DeviceState *dev = DEVICE(obj);
+    Object *obj = OBJECT(dev);
     Exynos4210GicState *s = EXYNOS4210_GIC(obj);
     SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
     const char cpu_prefix[] = "exynos4210-gic-alias_cpu";
@@ -347,13 +347,13 @@ static void exynos4210_gic_class_init(ObjectClass *klass, void *data)
     DeviceClass *dc = DEVICE_CLASS(klass);
 
     dc->props = exynos4210_gic_properties;
+    dc->realize = exynos4210_gic_realize;
 }
 
 static const TypeInfo exynos4210_gic_info = {
     .name          = TYPE_EXYNOS4210_GIC,
     .parent        = TYPE_SYS_BUS_DEVICE,
     .instance_size = sizeof(Exynos4210GicState),
-    .instance_init = exynos4210_gic_init,
     .class_init    = exynos4210_gic_class_init,
 };