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| author | Cédric Le Goater <clg@kaod.org> | 2017-12-01 17:06:01 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2017-12-15 09:49:24 +1100 |
| commit | ed0c37eedfdb953d61d1e0a41439cd404e914d9d (patch) | |
| tree | 6a6f66658e2acfa014a20f76f5c6ac350b61ca23 /hw/intc | |
| parent | 4f7a47beebd6d37861d08c81941be1b33a0ae627 (diff) | |
| download | focaccia-qemu-ed0c37eedfdb953d61d1e0a41439cd404e914d9d.tar.gz focaccia-qemu-ed0c37eedfdb953d61d1e0a41439cd404e914d9d.zip | |
ppc/xics: assign of the CPU 'intc' pointer under the core
The 'intc' pointer of the CPU references the interrupt presenter in the XICS interrupt mode. When the XIVE interrupt mode is available and activated, the machine will need to reassign this pointer to reflect the change. Moving this assignment under the realize routine of the CPU will ease the process when the interrupt mode is toggled. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/intc')
| -rw-r--r-- | hw/intc/xics.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/hw/intc/xics.c b/hw/intc/xics.c index bfc6b5bb23..700f6baa13 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -334,7 +334,6 @@ static void icp_realize(DeviceState *dev, Error **errp) } cpu = POWERPC_CPU(obj); - cpu->intc = OBJECT(icp); icp->cs = CPU(obj); env = &cpu->env; |