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| author | Bibo Mao <maobibo@loongson.cn> | 2025-09-06 15:01:58 +0800 |
|---|---|---|
| committer | Song Gao <gaosong@loongson.cn> | 2025-09-18 17:38:34 +0800 |
| commit | 0c042601a638c37a95690c6429af5a1b5a35d1dd (patch) | |
| tree | a9adce0685196b588a0f9e18f4e3cfafd11fcf53 /hw/loongarch | |
| parent | f0007b7f03e2d7fc33e71c3a582f2364c51a226b (diff) | |
| download | focaccia-qemu-0c042601a638c37a95690c6429af5a1b5a35d1dd.tar.gz focaccia-qemu-0c042601a638c37a95690c6429af5a1b5a35d1dd.zip | |
hw/loongarch/virt: Add BSP support with aux boot code
If system boots directly from Linux kernel, BSP core jumps to kernel entry of Linux kernel image and other APs jump to aux boot code. Instead BSP and APs can all jump to aux boot code like UEFI bios. With aux boot code, BSP core is judged from physical cpu id, whose cpu id is 0. With BSP core, load data to register A0-A2 and PC. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-ID: <20250906070200.3749326-2-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Diffstat (limited to 'hw/loongarch')
| -rw-r--r-- | hw/loongarch/boot.c | 36 |
1 files changed, 34 insertions, 2 deletions
diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c index 14d6c52d4e..4962668e5a 100644 --- a/hw/loongarch/boot.c +++ b/hw/loongarch/boot.c @@ -35,13 +35,19 @@ struct loongarch_linux_hdr { uint32_t pe_header_offset; } QEMU_PACKED; -static const unsigned int slave_boot_code[] = { +static const unsigned int aux_boot_code[] = { /* Configure reset ebase. */ 0x0400302c, /* csrwr $t0, LOONGARCH_CSR_EENTRY */ /* Disable interrupt. */ 0x0380100c, /* ori $t0, $zero,0x4 */ 0x04000180, /* csrxchg $zero, $t0, LOONGARCH_CSR_CRMD */ + 0x03400000, /* nop */ + + 0x0400800c, /* csrrd $t0, LOONGARCH_CSR_CPUNUM */ + 0x034ffd8c, /* andi $t0, $t0, 0x3ff */ + 0x0015000d, /* move $t1, $zero */ + 0x5800718d, /* beq $t0, $t1, 112 */ /* Clear mailbox. */ 0x1400002d, /* lu12i.w $t1, 1(0x1) */ @@ -81,6 +87,26 @@ static const unsigned int slave_boot_code[] = { 0x06480dac, /* iocsrrd.d $t0, $t1 */ 0x00150181, /* move $ra, $t0 */ 0x4c000020, /* jirl $zero, $ra,0 */ + /* BSP Core */ + 0x03400000, /* nop */ + 0x1800000d, /* pcaddi $t1, 0 */ + 0x28c0a1a4, /* ld.d $a0, $t1, 40 */ + 0x1800000d, /* pcaddi $t1, 0 */ + 0x28c0a1a5, /* ld.d $a1, $t1, 40 */ + 0x1800000d, /* pcaddi $t1, 0 */ + 0x28c0a1a6, /* ld.d $a2, $t1, 40 */ + 0x1800000d, /* pcaddi $t1, 0 */ + 0x28c0a1ac, /* ld.d $t0, $t1, 40 */ + 0x00150181, /* move $ra, $t0 */ + 0x4c000020, /* jirl $zero, $ra,0 */ + 0x00000000, /* .dword 0 A0 */ + 0x00000000, + 0x00000000, /* .dword 0 A1 */ + 0x00000000, + 0x00000000, /* .dword 0 A2 */ + 0x00000000, + 0x00000000, /* .dword 0 PC */ + 0x00000000, }; static inline void *guidcpy(void *dst, const void *src) @@ -391,6 +417,7 @@ static void loongarch_direct_kernel_boot(MachineState *ms, int64_t kernel_addr = VIRT_FLASH0_BASE; LoongArchCPU *lacpu; CPUState *cs; + uint64_t *data; if (info->kernel_filename) { kernel_addr = load_kernel_info(info); @@ -408,7 +435,12 @@ static void loongarch_direct_kernel_boot(MachineState *ms, /* Load slave boot code at pflash0 . */ void *boot_code = g_malloc0(VIRT_FLASH0_SIZE); - memcpy(boot_code, &slave_boot_code, sizeof(slave_boot_code)); + memcpy(boot_code, &aux_boot_code, sizeof(aux_boot_code)); + data = (uint64_t *)(boot_code + sizeof(aux_boot_code)); + *(data - 4) = cpu_to_le64(info->a0); + *(data - 3) = cpu_to_le64(info->a1); + *(data - 2) = cpu_to_le64(info->a2); + *(data - 1) = cpu_to_le64(kernel_addr); rom_add_blob_fixed("boot_code", boot_code, VIRT_FLASH0_SIZE, VIRT_FLASH0_BASE); CPU_FOREACH(cs) { |