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| author | Peter Maydell <peter.maydell@linaro.org> | 2011-03-22 12:16:16 +0000 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2011-06-22 15:02:08 +0000 |
| commit | 74594c9d813e4d14e9c16cc71824d8905bedc19d (patch) | |
| tree | c8bf7a0dffbcc6db04bafb63c87a2fcbb090c969 /hw/mips.h | |
| parent | b501b5e461fbf3f5c6cd91c8c933e6f4de627bee (diff) | |
| download | focaccia-qemu-74594c9d813e4d14e9c16cc71824d8905bedc19d.tar.gz focaccia-qemu-74594c9d813e4d14e9c16cc71824d8905bedc19d.zip | |
target-arm: Minimal implementation of performance counters
Newer Linux kernels assume the existence of the performance counter cp15 registers. Provide a minimal implementation of these registers. We support no events. This should be compliant with the ARM ARM, except that we don't implement the cycle counter. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/mips.h')
0 files changed, 0 insertions, 0 deletions