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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2022-12-11 19:55:41 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-01-13 09:32:32 +0100 |
| commit | 9356a2d2be024480aa7f65a598f8c8283f04faa8 (patch) | |
| tree | 4e918acb2e5a17d409b2dec21cee843c7109529c /hw/mips/bootloader.c | |
| parent | 5d380e4ca898e7f0ebd436e255a7da4869b15a71 (diff) | |
| download | focaccia-qemu-9356a2d2be024480aa7f65a598f8c8283f04faa8.tar.gz focaccia-qemu-9356a2d2be024480aa7f65a598f8c8283f04faa8.zip | |
hw/mips/bootloader: Implement nanoMIPS JALRc opcode generator
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20221211204533.85359-6-philmd@linaro.org>
Diffstat (limited to 'hw/mips/bootloader.c')
| -rw-r--r-- | hw/mips/bootloader.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index 9fc926d83f..1dd6ef2096 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -129,7 +129,17 @@ static void bl_gen_dsll(void **p, bl_reg rd, bl_reg rt, uint8_t sa) static void bl_gen_jalr(void **p, bl_reg rs) { - bl_gen_r_type(p, 0, rs, 0, BL_REG_RA, 0, 0x09); + if (bootcpu_supports_isa(ISA_NANOMIPS32)) { + uint32_t insn = 0; + + insn = deposit32(insn, 26, 6, 0b010010); /* JALRC */ + insn = deposit32(insn, 21, 5, BL_REG_RA); + insn = deposit32(insn, 16, 5, rs); + + st_nm32_p(p, insn); + } else { + bl_gen_r_type(p, 0, rs, 0, BL_REG_RA, 0, 0x09); + } } static void bl_gen_lui_nm(void **ptr, bl_reg rt, uint32_t imm20) |