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| author | Nicholas Piggin <npiggin@gmail.com> | 2025-05-12 13:10:40 +1000 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2025-07-21 08:03:52 +0200 |
| commit | 46f5ee8885a521c56e60820bf35aba4e94e16cf7 (patch) | |
| tree | 124b4e2fcbbc17916f837c07991a331ec8f7e339 /hw/mips/jazz.c | |
| parent | d16214ed2c57a31b5de7e2c115c65b831170a60e (diff) | |
| download | focaccia-qemu-46f5ee8885a521c56e60820bf35aba4e94e16cf7.tar.gz focaccia-qemu-46f5ee8885a521c56e60820bf35aba4e94e16cf7.zip | |
ppc/xive: Fix high prio group interrupt being preempted by low prio VP
xive_tctx_pipr_present() as implemented with xive_tctx_pipr_update() causes VP-directed (group==0) interrupt to be presented in PIPR and NSR despite being a lower priority than the currently presented group interrupt. This must not happen. The IPB bit should record the low priority VP interrupt, but PIPR and NSR must not present the lower priority interrupt. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Reviewed-by: Michael Kowal <kowal@linux.ibm.com> Tested-by: Gautam Menghani <gautam@linux.ibm.com> Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-32-npiggin@gmail.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'hw/mips/jazz.c')
0 files changed, 0 insertions, 0 deletions