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| author | Anthony Liguori <aliguori@us.ibm.com> | 2012-03-14 16:47:49 -0500 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2012-03-14 16:47:49 -0500 |
| commit | aea6ff7fa07b046fb9f43d6262d6e34b77e8437e (patch) | |
| tree | dd3043d1742273a95fa7fc5e99b8d5ffe0c710e5 /hw/mips_malta.c | |
| parent | 9e4dd565b46749d5e6d5cf87bfd84f1917c68319 (diff) | |
| parent | dd83b06ae61cfa2dc4381ab49f365bd0995fc930 (diff) | |
| download | focaccia-qemu-aea6ff7fa07b046fb9f43d6262d6e34b77e8437e.tar.gz focaccia-qemu-aea6ff7fa07b046fb9f43d6262d6e34b77e8437e.zip | |
Merge remote-tracking branch 'afaerber/qom-cpu.v5' into staging
* afaerber/qom-cpu.v5: (43 commits) qom: Introduce CPU class Rename CPUState -> CPUArchState xtensa hw/: Don't use CPUState sparc hw/: Don't use CPUState sh4 hw/: Don't use CPUState s390x hw/: Don't use CPUState ppc hw/: Don't use CPUState mips hw/: Don't use CPUState microblaze hw/: Don't use CPUState m68k hw/: Don't use CPUState lm32 hw/: Don't use CPUState i386 hw/: Don't use CPUState cris hw/: Don't use CPUState arm hw/: Don't use CPUState alpha hw/: Don't use CPUState xtensa-semi: Don't use CPUState m68k-semi: Don't use CPUState arm-semi: Don't use CPUState target-xtensa: Don't overuse CPUState target-unicore32: Don't overuse CPUState ...
Diffstat (limited to 'hw/mips_malta.c')
| -rw-r--r-- | hw/mips_malta.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/hw/mips_malta.c b/hw/mips_malta.c index 866699dbf0..5e26775e64 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -500,7 +500,7 @@ static void network_init(void) a3 - RAM size in bytes */ -static void write_bootloader (CPUState *env, uint8_t *base, +static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t kernel_entry) { uint32_t *p; @@ -736,7 +736,7 @@ static int64_t load_kernel (void) return kernel_entry; } -static void malta_mips_config(CPUState *env) +static void malta_mips_config(CPUMIPSState *env) { env->mvp->CP0_MVPConf0 |= ((smp_cpus - 1) << CP0MVPC0_PVPE) | ((smp_cpus * env->nr_threads - 1) << CP0MVPC0_PTC); @@ -744,8 +744,8 @@ static void malta_mips_config(CPUState *env) static void main_cpu_reset(void *opaque) { - CPUState *env = opaque; - cpu_reset(env); + CPUMIPSState *env = opaque; + cpu_state_reset(env); /* The bootloader does not need to be rewritten as it is located in a read only location. The kernel location and the arguments table @@ -759,7 +759,7 @@ static void main_cpu_reset(void *opaque) static void cpu_request_exit(void *opaque, int irq, int level) { - CPUState *env = cpu_single_env; + CPUMIPSState *env = cpu_single_env; if (env && level) { cpu_exit(env); @@ -781,7 +781,7 @@ void mips_malta_init (ram_addr_t ram_size, int64_t kernel_entry; PCIBus *pci_bus; ISABus *isa_bus; - CPUState *env; + CPUMIPSState *env; qemu_irq *isa_irq; qemu_irq *cpu_exit_irq; int piix4_devfn; |