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authorRichard Henderson <rth@twiddle.net>2010-03-19 12:00:26 -0700
committerAurelien Jarno <aurelien@aurel32.net>2010-03-26 23:01:03 +0100
commit86feb1c860dc38e9c89e787c5210e8191800385e (patch)
tree2ccf426a9d8f4499751e14213a239cc7df58c054 /hw/mips_timer.c
parent32d98fbd10415433283a6cbdde86c3305b0ba8c2 (diff)
downloadfocaccia-qemu-86feb1c860dc38e9c89e787c5210e8191800385e.tar.gz
focaccia-qemu-86feb1c860dc38e9c89e787c5210e8191800385e.zip
tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.
Some targets (e.g. Alpha and MIPS64) need to keep 32-bit operands
sign-extended in 64-bit registers (regardless of the "real" sign
of the operand).  For that, we need to be able to distinguish
between a 32-bit load with a 32-bit result and a 32-bit load with
a given extension to a 64-bit result.  This distinction already
exists for the ld* loads, but not the qemu_ld* loads.

Reserve qemu_ld32u for 64-bit outputs and introduce qemu_ld32 for
32-bit outputs.  Adjust all code generators to match.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'hw/mips_timer.c')
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