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| author | Peter Maydell <peter.maydell@linaro.org> | 2016-07-14 17:32:53 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-07-14 17:32:53 +0100 |
| commit | 14c7d99333e4a474c65bdae6f99aa8837e8078e6 (patch) | |
| tree | 32c8874413f0ab109176d649557e1eb63c053805 /hw/misc/aspeed_scu.c | |
| parent | 1c8e93fb41c1ee37853ff7b85ebe1218a4a43780 (diff) | |
| parent | 79a9f323a80b802ca98895d1c2d4aaf23cff815a (diff) | |
| download | focaccia-qemu-14c7d99333e4a474c65bdae6f99aa8837e8078e6.tar.gz focaccia-qemu-14c7d99333e4a474c65bdae6f99aa8837e8078e6.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160714' into staging
target-arm queue: * add virtio-mmio transport base address to device path (avoid an assertion failure with multiple virtio-scsi-devices) * revert hw/ptimer commit 5a50307 which causes regressions on SPARC guests * use Neon to accelerate zero-page checking on AArch64 hosts * set the MPIDR for TCG to match how KVM does it (and fit with GICv2/GICv3 restrictions on SGI target lists) * add some missing AArch32 TLBI hypervisor TLB operations * m25p80: Fix QIOR/DIOR handling for Winbond * hw/misc: fix typo in Aspeed SCU hw-strap2 property name * ast2400: pretend DMAs are done for U-boot * ast2400: some minor code cleanups # gpg: Signature made Thu 14 Jul 2016 17:21:30 BST # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20160714: ast2400: externalize revision numbers ast2400: pretend DMAs are done for U-boot ast2400: replace aspeed_smc_is_implemented() hw/misc: fix typo in Aspeed SCU hw-strap2 property name m25p80: Fix QIOR/DIOR handling for Winbond target-arm: Add missed AArch32 TLBI sytem registers hw/arm/virt: tcg: adjust MPIDR like KVM gic: provide defines for v2/v3 targetlist sizes target-arm: Use Neon for zero checking Revert "hw/ptimer: Perform counter wrap around if timer already expired" virtio-mmio: format transport base address in BusClass.get_dev_path Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/misc/aspeed_scu.c')
| -rw-r--r-- | hw/misc/aspeed_scu.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index 23f51752b0..c7e2c8263f 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -88,8 +88,6 @@ #define PROT_KEY_UNLOCK 0x1688A8A8 #define SCU_IO_REGION_SIZE 0x20000 -#define AST2400_A0_SILICON_REV 0x02000303U - static const uint32_t ast2400_a0_resets[ASPEED_SCU_NR_REGS] = { [SYS_RST_CTRL] = 0xFFCFFEDCU, [CLK_SEL] = 0xF3F40000U, @@ -212,7 +210,7 @@ static void aspeed_scu_reset(DeviceState *dev) static uint32_t aspeed_silicon_revs[] = { AST2400_A0_SILICON_REV, }; -static bool is_supported_silicon_rev(uint32_t silicon_rev) +bool is_supported_silicon_rev(uint32_t silicon_rev) { int i; @@ -255,7 +253,7 @@ static const VMStateDescription vmstate_aspeed_scu = { static Property aspeed_scu_properties[] = { DEFINE_PROP_UINT32("silicon-rev", AspeedSCUState, silicon_rev, 0), DEFINE_PROP_UINT32("hw-strap1", AspeedSCUState, hw_strap1, 0), - DEFINE_PROP_UINT32("hw-strap2", AspeedSCUState, hw_strap1, 0), + DEFINE_PROP_UINT32("hw-strap2", AspeedSCUState, hw_strap2, 0), DEFINE_PROP_END_OF_LIST(), }; |