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| author | Peter Maydell <peter.maydell@linaro.org> | 2023-01-05 21:04:52 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-01-05 21:04:52 +0000 |
| commit | d365cb0b9d14eb562ce85d3acfe36e8aad13df3f (patch) | |
| tree | b1486780a04ef1ea5124f15350a08be99b9b7918 /hw/misc/imx7_ccm.c | |
| parent | d1852caab131ea898134fdcea8c14bc2ee75fbe9 (diff) | |
| parent | 93c9678de9dc7d2e68f9e8477da072bac30ef132 (diff) | |
| download | focaccia-qemu-d365cb0b9d14eb562ce85d3acfe36e8aad13df3f.tar.gz focaccia-qemu-d365cb0b9d14eb562ce85d3acfe36e8aad13df3f.zip | |
Merge tag 'pull-target-arm-20230105' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Implement AArch32 ARMv8-R support * Add Cortex-R52 CPU * fix handling of HLT semihosting in system mode * hw/timer/ixm_epit: cleanup and fix bug in compare handling * target/arm: Coding style fixes * target/arm: Clean up includes * nseries: minor code cleanups * target/arm: align exposed ID registers with Linux * hw/arm/smmu-common: remove unnecessary inlines * i.MX7D: Handle GPT timers * i.MX7D: Connect IRQs to GPIO devices * i.MX6UL: Add a specific GPT timer instance * hw/net: Fix read of uninitialized memory in imx_fec # gpg: Signature made Thu 05 Jan 2023 16:43:18 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20230105' of https://git.linaro.org/people/pmaydell/qemu-arm: (34 commits) hw/net: Fix read of uninitialized memory in imx_fec. i.MX7D: Connect IRQs to GPIO devices. i.MX6UL: Add a specific GPT timer instance for the i.MX6UL i.MX7D: Compute clock frequency for the fixed frequency clocks. i.MX7D: Connect GPT timers to IRQ hw/arm/smmu-common: Avoid using inlined functions with external linkage hw/arm/smmu-common: Reduce smmu_inv_notifiers_mr() scope target/arm: align exposed ID registers with Linux hw/arm/nseries: Silent -Wmissing-field-initializers warning hw/arm/nseries: Constify various read-only arrays hw/input/tsc2xxx: Constify set_transform()'s MouseTransformInfo arg target/arm: cleanup cpu includes target/arm: Remove unused includes from helper.c target/arm: Remove unused includes from m_helper.c target/arm: Fix checkpatch brace errors in helper.c target/arm: Fix checkpatch space errors in helper.c target/arm: Fix checkpatch comment style warnings in helper.c hw/timer/imx_epit: fix compare timer handling hw/timer/imx_epit: remove explicit fields cnt and freq hw/timer/imx_epit: factor out register write handlers ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/misc/imx7_ccm.c')
| -rw-r--r-- | hw/misc/imx7_ccm.c | 49 |
1 files changed, 40 insertions, 9 deletions
diff --git a/hw/misc/imx7_ccm.c b/hw/misc/imx7_ccm.c index 075159e497..f135ec7b7e 100644 --- a/hw/misc/imx7_ccm.c +++ b/hw/misc/imx7_ccm.c @@ -16,6 +16,10 @@ #include "hw/misc/imx7_ccm.h" #include "migration/vmstate.h" +#include "trace.h" + +#define CKIH_FREQ 24000000 /* 24MHz crystal input */ + static void imx7_analog_reset(DeviceState *dev) { IMX7AnalogState *s = IMX7_ANALOG(dev); @@ -219,16 +223,43 @@ static const VMStateDescription vmstate_imx7_ccm = { static uint32_t imx7_ccm_get_clock_frequency(IMXCCMState *dev, IMXClk clock) { /* - * This function is "consumed" by GPT emulation code, however on - * i.MX7 each GPT block can have their own clock root. This means - * that this functions needs somehow to know requester's identity - * and the way to pass it: be it via additional IMXClk constants - * or by adding another argument to this method needs to be - * figured out + * This function is "consumed" by GPT emulation code. Some clocks + * have fixed frequencies and we can provide requested frequency + * easily. However for CCM provided clocks (like IPG) each GPT + * timer can have its own clock root. + * This means we need additionnal information when calling this + * function to know the requester's identity. */ - qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Not implemented\n", - TYPE_IMX7_CCM, __func__); - return 0; + uint32_t freq = 0; + + switch (clock) { + case CLK_NONE: + break; + case CLK_32k: + freq = CKIL_FREQ; + break; + case CLK_HIGH: + freq = CKIH_FREQ; + break; + case CLK_IPG: + case CLK_IPG_HIGH: + /* + * For now we don't have a way to figure out the device this + * function is called for. Until then the IPG derived clocks + * are left unimplemented. + */ + qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Clock %d Not implemented\n", + TYPE_IMX7_CCM, __func__, clock); + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: unsupported clock %d\n", + TYPE_IMX7_CCM, __func__, clock); + break; + } + + trace_ccm_clock_freq(clock, freq); + + return freq; } static void imx7_ccm_class_init(ObjectClass *klass, void *data) |