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| author | Richard Henderson <richard.henderson@linaro.org> | 2021-12-13 09:38:38 -0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-12-23 17:47:01 -0800 |
| commit | 05bfd4db08608bc4c22de729780c1f74612fbc0e (patch) | |
| tree | 0828ad00145351584c77a6e3ec71952f79494372 /hw/misc/macio/mac_dbdma.c | |
| parent | f18155a207dbc6a23f06a4af667280743819c31e (diff) | |
| download | focaccia-qemu-05bfd4db08608bc4c22de729780c1f74612fbc0e.tar.gz focaccia-qemu-05bfd4db08608bc4c22de729780c1f74612fbc0e.zip | |
target/hppa: Fix deposit assert from trans_shrpw_imm
Because sa may be 0,
tcg_gen_deposit_reg(dest, t0, cpu_gr[a->r1], 32 - sa, sa);
may attempt a zero-width deposit at bit 32, which will assert
for TARGET_REGISTER_BITS == 32.
Use the newer extract2 when possible, which itself includes the
rotri special case; otherwise mirror the code from trans_shrpw_sar,
using concat and shri.
Cc: qemu-stable@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/635
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/misc/macio/mac_dbdma.c')
0 files changed, 0 insertions, 0 deletions