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| author | Ashok Raj <ashok.raj@intel.com> | 2016-06-22 14:56:21 +0800 |
|---|---|---|
| committer | Eduardo Habkost <ehabkost@redhat.com> | 2016-07-07 15:25:16 -0300 |
| commit | 87f8b626041ceaea9adcfdbd549359f0ca7b871d (patch) | |
| tree | fb58c95574a63176221118f6e710a75ae5c6f1d5 /hw/misc/mips_cpc.c | |
| parent | c35bd19a5c9140bce8b913cc5cefe6f071135bdb (diff) | |
| download | focaccia-qemu-87f8b626041ceaea9adcfdbd549359f0ca7b871d.tar.gz focaccia-qemu-87f8b626041ceaea9adcfdbd549359f0ca7b871d.zip | |
target-i386: kvm: Add basic Intel LMCE support
This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they
are injected to only one VCPU rather than broadcast to all VCPUs. As KVM
reports LMCE support on Intel platforms, this features is only available
on Intel platforms.
LMCE is disabled by default and can be enabled/disabled by cpu option
'lmce=on/off'.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
[Haozhong: Enable LMCE only on Intel platforms
Disable LMCE by default and add a cpu option 'lmce'
Handle the error if LMCE is enabled w/o host support
Remove MCG_LMCE_P from MCE_CAP_DEF
Add migration support for LMCE
Minor code style changes]
Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'hw/misc/mips_cpc.c')
0 files changed, 0 insertions, 0 deletions