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authorPeter Maydell <peter.maydell@linaro.org>2018-08-20 11:24:32 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-08-20 11:24:32 +0100
commit68e78e332cb1c3f8b0317a0443acb2b5e190f0dd (patch)
tree14bf589d9c738f0bbce5d7bf43b3bd91afa867a8 /hw/misc/mmio_interface.c
parentcba517c31e7df8932c4473c477a0f01d8a0adc48 (diff)
downloadfocaccia-qemu-68e78e332cb1c3f8b0317a0443acb2b5e190f0dd.tar.gz
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target/arm: Implement ESR_EL2/HSR for AArch32 and no-EL2
The AArch32 HSR is the equivalent of AArch64 ESR_EL2;
we can implement it by marking our existing ESR_EL2 regdef
as STATE_BOTH. It also needs to be "RES0 from EL3 if
EL2 not implemented", so add the missing stanza to
el3_no_el2_cp_reginfo.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Message-id: 20180814124254.5229-8-peter.maydell@linaro.org
Diffstat (limited to 'hw/misc/mmio_interface.c')
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