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| author | Peter Maydell <peter.maydell@linaro.org> | 2024-06-28 15:23:46 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-07-11 11:41:33 +0100 |
| commit | db397a81eea8a7dce25804398caa750fd6700e49 (patch) | |
| tree | 5ed21e8fe13b1848dffcee62b10718b7a9483502 /hw/misc/stm32l4x5_exti.c | |
| parent | a26db547b7d571d97d33afc0f952afa34678ea3b (diff) | |
| download | focaccia-qemu-db397a81eea8a7dce25804398caa750fd6700e49.tar.gz focaccia-qemu-db397a81eea8a7dce25804398caa750fd6700e49.zip | |
target/arm: Rename FPSR_MASK and FPCR_MASK and define them symbolically
Now that we store FPSR and FPCR separately, the FPSR_MASK and FPCR_MASK macros are slightly confusingly named and the comment describing them is out of date. Rename them to FPSCR_FPSR_MASK and FPSCR_FPCR_MASK, document that they are the mask of which FPSCR bits are architecturally mapped to which AArch64 register, and define them symbolically rather than as hex values. (This latter requires defining some extra macros for bits which we haven't previously defined.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240628142347.1283015-9-peter.maydell@linaro.org
Diffstat (limited to 'hw/misc/stm32l4x5_exti.c')
0 files changed, 0 insertions, 0 deletions