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authorAtish Patra <atishp@rivosinc.com>2024-07-24 01:31:36 -0700
committerAlistair Francis <alistair.francis@wdc.com>2024-08-06 14:20:16 +1000
commit73b0195416c4063c7cbf22b305ee6c48d6cd2d24 (patch)
treec0cef43f828e05a283285f18bacc7d0e76d3219c /hw/misc/stm32l4x5_rcc.c
parent5e54b439f5be1e604453d9b02d85685a266121da (diff)
downloadfocaccia-qemu-73b0195416c4063c7cbf22b305ee6c48d6cd2d24.tar.gz
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target/riscv: Add asserts for out-of-bound access
Coverity complained about the possible out-of-bounds access with
counter_virt/counter_virt_prev because these two arrays are
accessed with privilege mode. However, these two arrays are accessed
only when virt is enabled. Thus, the privilege mode can't be M mode.

Add the asserts anyways to detect any wrong usage of these arrays
in the future.

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Fixes: Coverity CID 1558459
Fixes: Coverity CID 1558462
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240724-fixes-v1-1-4a64596b0d64@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/misc/stm32l4x5_rcc.c')
0 files changed, 0 insertions, 0 deletions