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| author | Peter Maydell <peter.maydell@linaro.org> | 2022-03-24 20:08:39 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-03-24 20:08:39 +0000 |
| commit | 10c473246b17be5aa72eac1ba64c1f5a690bc7ef (patch) | |
| tree | c79b49771b512d9845c1418ecb1ad9b6e5808bc5 /hw/misc/trace-events | |
| parent | 9c721291506c037d934900a6167dc3bf4a8f51a6 (diff) | |
| parent | 2539eade4f689eda7e9fe45486f18334bfbafaf0 (diff) | |
| download | focaccia-qemu-10c473246b17be5aa72eac1ba64c1f5a690bc7ef.tar.gz focaccia-qemu-10c473246b17be5aa72eac1ba64c1f5a690bc7ef.zip | |
Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging
Pull request Philippe found cases where the 0x%d format string was used, leading to misleading output. The patches look harmless and could save people time, so I think it's worth including them in 7.0. # gpg: Signature made Thu 24 Mar 2022 17:15:20 GMT # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full] # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * tag 'block-pull-request' of https://gitlab.com/stefanha/qemu: hw: Fix misleading hexadecimal format block: Fix misleading hexadecimal format Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/misc/trace-events')
| -rw-r--r-- | hw/misc/trace-events | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/misc/trace-events b/hw/misc/trace-events index bd52cfc110..4e0c7973a4 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -1,7 +1,7 @@ # See docs/devel/tracing.rst for syntax documentation. # allwinner-cpucfg.c -allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIu32 +allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIx32 allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 @@ -93,7 +93,7 @@ imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08 # mos6522.c mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d" -mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64 +mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRIx64 " delta_next=0x%"PRIx64 mos6522_set_sr_int(void) "set sr_int" mos6522_write(uint64_t addr, const char *name, uint64_t val) "reg=0x%"PRIx64 " [%s] val=0x%"PRIx64 mos6522_read(uint64_t addr, const char *name, unsigned val) "reg=0x%"PRIx64 " [%s] val=0x%x" |