diff options
| author | Kane-Chen-AS <kane_chen@aspeedtech.com> | 2025-08-12 17:40:05 +0800 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2025-09-29 18:00:20 +0200 |
| commit | 61dcc2c2db0236fde878d053028c39fe27dc8f36 (patch) | |
| tree | 3851786bd04ab137828e9192ed14fe620d58eadf /hw/misc/trace-events | |
| parent | 02cebef5a140a0008a8bb0d3db6e33a4e7e4a9d2 (diff) | |
| download | focaccia-qemu-61dcc2c2db0236fde878d053028c39fe27dc8f36.tar.gz focaccia-qemu-61dcc2c2db0236fde878d053028c39fe27dc8f36.zip | |
hw/misc/aspeed_sbc: Handle OTP write command for voltage mode registers
Extend OTP command handling to recognize specific voltage mode register addresses and emulate the expected hardware behavior. Without this change, legitimate voltage mode change requests would be incorrectly reported as "Unknown command" and logged as an error. This implementation does not perform actual mode changes, but ensures that valid requests are accepted and ignored as per hardware behavior. Signed-off-by: Kane-Chen-AS <kane_chen@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250812094011.2617526-9-kane_chen@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'hw/misc/trace-events')
| -rw-r--r-- | hw/misc/trace-events | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/misc/trace-events b/hw/misc/trace-events index 9e05b82f37..eeb9243898 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -91,6 +91,7 @@ slavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x" slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x" # aspeed_sbc.c +aspeed_sbc_ignore_cmd(uint32_t cmd) "Ignoring command 0x%" PRIx32 aspeed_sbc_handle_cmd(uint32_t cmd, uint32_t addr, bool ret) "Handling command 0x%" PRIx32 " for OTP addr 0x%" PRIx32 " Result: %d" aspeed_sbc_otp_read(uint32_t addr, uint32_t value) "OTP Memory read: addr 0x%" PRIx32 " value 0x%" PRIx32 aspeed_sbc_otp_prog(uint32_t addr, uint32_t value) "OTP Memory write: addr 0x%" PRIx32 " value 0x%" PRIx32 |