summary refs log tree commit diff stats
path: root/hw/misc/zynq_slcr.c
diff options
context:
space:
mode:
authorEduardo Habkost <ehabkost@redhat.com>2020-09-03 16:43:22 -0400
committerEduardo Habkost <ehabkost@redhat.com>2020-09-09 09:26:43 -0400
commitdb1015e92e04835c9eb50c29625fe566d1202dbd (patch)
tree41fbc0bf3e3f29b7ecb339224a049e3f2a7db8fa /hw/misc/zynq_slcr.c
parent1c8eef0227e2942264063f22f10a06b84e0d3fa9 (diff)
downloadfocaccia-qemu-db1015e92e04835c9eb50c29625fe566d1202dbd.tar.gz
focaccia-qemu-db1015e92e04835c9eb50c29625fe566d1202dbd.zip
Move QOM typedefs and add missing includes
Some typedefs and macros are defined after the type check macros.
This makes it difficult to automatically replace their
definitions with OBJECT_DECLARE_TYPE.

Patch generated using:

 $ ./scripts/codeconverter/converter.py -i \
   --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]')

which will split "typdef struct { ... } TypedefName"
declarations.

Followed by:

 $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \
    $(git grep -l '' -- '*.[ch]')

which will:
- move the typedefs and #defines above the type check macros
- add missing #include "qom/object.h" lines if necessary

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-9-ehabkost@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-10-ehabkost@redhat.com>
Message-Id: <20200831210740.126168-11-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'hw/misc/zynq_slcr.c')
-rw-r--r--hw/misc/zynq_slcr.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c
index f7472d1f3c..223f533ce8 100644
--- a/hw/misc/zynq_slcr.c
+++ b/hw/misc/zynq_slcr.c
@@ -23,6 +23,7 @@
 #include "qemu/module.h"
 #include "hw/registerfields.h"
 #include "hw/qdev-clock.h"
+#include "qom/object.h"
 
 #ifndef ZYNQ_SLCR_ERR_DEBUG
 #define ZYNQ_SLCR_ERR_DEBUG 0
@@ -182,9 +183,10 @@ REG32(DDRIOB, 0xb40)
 #define ZYNQ_SLCR_NUM_REGS      (ZYNQ_SLCR_MMIO_SIZE / 4)
 
 #define TYPE_ZYNQ_SLCR "xilinx,zynq_slcr"
+typedef struct ZynqSLCRState ZynqSLCRState;
 #define ZYNQ_SLCR(obj) OBJECT_CHECK(ZynqSLCRState, (obj), TYPE_ZYNQ_SLCR)
 
-typedef struct ZynqSLCRState {
+struct ZynqSLCRState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -194,7 +196,7 @@ typedef struct ZynqSLCRState {
     Clock *ps_clk;
     Clock *uart0_ref_clk;
     Clock *uart1_ref_clk;
-} ZynqSLCRState;
+};
 
 /*
  * return the output frequency of ARM/DDR/IO pll