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| author | Peter Maydell <peter.maydell@linaro.org> | 2019-06-03 18:26:21 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-06-03 18:26:21 +0100 |
| commit | e2a58ff493a2e00db3e963c1839c5374500110f2 (patch) | |
| tree | 1136df9621eb962326714fa330eaad310fb8de12 /hw/misc | |
| parent | ad88e4252f09c2956b99c90de39e95bab2e8e7af (diff) | |
| parent | c87759ce876a7a0b17c2bf4f0b964bd51f0ee871 (diff) | |
| download | focaccia-qemu-e2a58ff493a2e00db3e963c1839c5374500110f2.tar.gz focaccia-qemu-e2a58ff493a2e00db3e963c1839c5374500110f2.zip | |
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
* Revert q35 to kernel irqchip (Alex) * edu device fixes (Li Qiang) * cleanups (Marc-André, Peter) * Improvements to -accel help * Better support for IA32_MISC_ENABLE MSR (Wanpeng) * I2C test conversion to qgraph (Paolo) # gpg: Signature made Mon 03 Jun 2019 14:20:12 BST # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (24 commits) q35: Revert to kernel irqchip configure: remove tpm_passthrough & tpm_emulator ci: store Patchew configuration in the tree libqos: i2c: move address into QI2CDevice tests: convert ds1338-test to qtest tests: convert OMAP i2c tests to qgraph libqos: add ARM imx25-pdk machine object libqos: add ARM n800 machine object libqos: convert I2C to qgraph libqos: split I2CAdapter initialization and allocation imx25-pdk: create ds1338 for qtest inside the test pca9552-test: do not rely on state across tests libqos: fix omap-i2c receiving more than 4 bytes libqos: move common i2c code to libqos qgraph: fix qos_node_contains with options qgraph: allow extra_device_opts on contains nodes edu: uses uint64_t in dma operation edu: mmio: allow 64-bit access in read dispatch edu: mmio: allow 64-bit access i386: Enable IA32_MISC_ENABLE MWAIT bit when exposing mwait/monitor ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/misc')
| -rw-r--r-- | hw/misc/edu.c | 32 |
1 files changed, 23 insertions, 9 deletions
diff --git a/hw/misc/edu.c b/hw/misc/edu.c index 91af452c9e..19e5545e2c 100644 --- a/hw/misc/edu.c +++ b/hw/misc/edu.c @@ -98,23 +98,24 @@ static void edu_lower_irq(EduState *edu, uint32_t val) } } -static bool within(uint32_t addr, uint32_t start, uint32_t end) +static bool within(uint64_t addr, uint64_t start, uint64_t end) { return start <= addr && addr < end; } -static void edu_check_range(uint32_t addr, uint32_t size1, uint32_t start, - uint32_t size2) +static void edu_check_range(uint64_t addr, uint64_t size1, uint64_t start, + uint64_t size2) { - uint32_t end1 = addr + size1; - uint32_t end2 = start + size2; + uint64_t end1 = addr + size1; + uint64_t end2 = start + size2; if (within(addr, start, end2) && end1 > addr && within(end1, start, end2)) { return; } - hw_error("EDU: DMA range 0x%.8x-0x%.8x out of bounds (0x%.8x-0x%.8x)!", + hw_error("EDU: DMA range 0x%016"PRIx64"-0x%016"PRIx64 + " out of bounds (0x%016"PRIx64"-0x%016"PRIx64")!", addr, end1 - 1, start, end2 - 1); } @@ -139,13 +140,13 @@ static void edu_dma_timer(void *opaque) } if (EDU_DMA_DIR(edu->dma.cmd) == EDU_DMA_FROM_PCI) { - uint32_t dst = edu->dma.dst; + uint64_t dst = edu->dma.dst; edu_check_range(dst, edu->dma.cnt, DMA_START, DMA_SIZE); dst -= DMA_START; pci_dma_read(&edu->pdev, edu_clamp_addr(edu, edu->dma.src), edu->dma_buf + dst, edu->dma.cnt); } else { - uint32_t src = edu->dma.src; + uint64_t src = edu->dma.src; edu_check_range(src, edu->dma.cnt, DMA_START, DMA_SIZE); src -= DMA_START; pci_dma_write(&edu->pdev, edu_clamp_addr(edu, edu->dma.dst), @@ -185,7 +186,11 @@ static uint64_t edu_mmio_read(void *opaque, hwaddr addr, unsigned size) EduState *edu = opaque; uint64_t val = ~0ULL; - if (size != 4) { + if (addr < 0x80 && size != 4) { + return val; + } + + if (addr >= 0x80 && size != 4 && size != 8) { return val; } @@ -289,6 +294,15 @@ static const MemoryRegionOps edu_mmio_ops = { .read = edu_mmio_read, .write = edu_mmio_write, .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 4, + .max_access_size = 8, + }, + .impl = { + .min_access_size = 4, + .max_access_size = 8, + }, + }; /* |