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| author | Beniamino Galvani <b.galvani@gmail.com> | 2014-03-25 19:22:10 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-04-17 21:34:06 +0100 |
| commit | 6619bc5c55c1322a89009e2edd530113da95d551 (patch) | |
| tree | 305b213a8168d24c8df60a3a930b3a800086a827 /hw/net/cadence_gem.c | |
| parent | 103db49a106d1f015a16432eb73cc4046792fbad (diff) | |
| download | focaccia-qemu-6619bc5c55c1322a89009e2edd530113da95d551.tar.gz focaccia-qemu-6619bc5c55c1322a89009e2edd530113da95d551.zip | |
allwinner-emac: update irq status after writes to interrupt registers
The irq line status must be updated after writes to the INT_CTL and INT_STA registers. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1395771730-16882-8-git-send-email-b.galvani@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/net/cadence_gem.c')
0 files changed, 0 insertions, 0 deletions