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| author | Linus Ziegert <linus.ziegert+qemu@holoplot.com> | 2019-11-19 13:20:27 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-11-19 13:20:27 +0000 |
| commit | 6623d214451ec4f784d1c82c51c655a01fed1b06 (patch) | |
| tree | fd0b4a2864a67440d4953789f60ce5052a67f621 /hw/net/cadence_gem.c | |
| parent | 3a6606c7aa1e6e687e435c1eae929a396bd866e3 (diff) | |
| download | focaccia-qemu-6623d214451ec4f784d1c82c51c655a01fed1b06.tar.gz focaccia-qemu-6623d214451ec4f784d1c82c51c655a01fed1b06.zip | |
net/cadence_gem: Set PHY autonegotiation restart status
The Linux kernel PHY driver sets AN_RESTART in the BMCR of the PHY when autonegotiation is started. Recently the kernel started to read back the PHY's AN_RESTART bit and now checks whether the autonegotiation is complete and the bit was cleared [1]. Otherwise the link status is down. The emulated PHY needs to clear AN_RESTART immediately to inform the kernel driver about the completion of autonegotiation phase. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c36757eb9dee Signed-off-by: Linus Ziegert <linus.ziegert+qemu@holoplot.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20191104181604.21943-1-linus.ziegert+qemu@holoplot.com Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/net/cadence_gem.c')
| -rw-r--r-- | hw/net/cadence_gem.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 7f9cb5ab95..b8be73dc55 100644 --- a/hw/net/cadence_gem.c +++ b/hw/net/cadence_gem.c @@ -271,9 +271,10 @@ #define PHY_REG_EXT_PHYSPCFC_ST 27 #define PHY_REG_CABLE_DIAG 28 -#define PHY_REG_CONTROL_RST 0x8000 -#define PHY_REG_CONTROL_LOOP 0x4000 -#define PHY_REG_CONTROL_ANEG 0x1000 +#define PHY_REG_CONTROL_RST 0x8000 +#define PHY_REG_CONTROL_LOOP 0x4000 +#define PHY_REG_CONTROL_ANEG 0x1000 +#define PHY_REG_CONTROL_ANRESTART 0x0200 #define PHY_REG_STATUS_LINK 0x0004 #define PHY_REG_STATUS_ANEGCMPL 0x0020 @@ -1345,7 +1346,7 @@ static void gem_phy_write(CadenceGEMState *s, unsigned reg_num, uint16_t val) } if (val & PHY_REG_CONTROL_ANEG) { /* Complete autonegotiation immediately */ - val &= ~PHY_REG_CONTROL_ANEG; + val &= ~(PHY_REG_CONTROL_ANEG | PHY_REG_CONTROL_ANRESTART); s->phy_regs[PHY_REG_STATUS] |= PHY_REG_STATUS_ANEGCMPL; } if (val & PHY_REG_CONTROL_LOOP) { |