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authorPeter Crosthwaite <peter.crosthwaite@xilinx.com>2015-05-14 19:22:52 -0700
committerPeter Maydell <peter.maydell@linaro.org>2015-05-18 16:31:59 +0100
commitee804264ddc4d3cd36a5183a09847e391da0fc66 (patch)
tree7523a998f43a6224531677e8b2794b20fb054a70 /hw/net/cadence_gem.c
parent385057cbec9b4a0eb6150330c572e875ed714965 (diff)
downloadfocaccia-qemu-ee804264ddc4d3cd36a5183a09847e391da0fc66.tar.gz
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target-arm: cpu64: generalise name of A57 regs
Rename some A57 CP register variables in preparation for support for
Cortex A53. Use "a57_a53" to describe the shareable features. Some of
the CP15 registers (such as ACTLR) are specific to implementation, but
we currently just RAZ them so continue with that as the policy for both
A57 and A53 processors under a shared definition.

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 5a5f957994677d91435190b3be1cefa6f657e274.1431381507.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/net/cadence_gem.c')
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