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| author | Peter Maydell <peter.maydell@linaro.org> | 2013-11-22 17:17:14 +0000 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2013-12-10 13:28:30 +0000 |
| commit | f5fdcd6e58ec35b4463569694fc15d28c505c4d0 (patch) | |
| tree | bb7640b27245d140d59ece4c64bc0a37d65726a8 /hw/net/cadence_gem.c | |
| parent | 5de164304ad6473c812f24a29fda33a2d1b2bf45 (diff) | |
| download | focaccia-qemu-f5fdcd6e58ec35b4463569694fc15d28c505c4d0.tar.gz focaccia-qemu-f5fdcd6e58ec35b4463569694fc15d28c505c4d0.zip | |
hw/arm: Add 'virt' platform
Add 'virt' platform support corresponding to arch/arm/mach-virt in the Linux kernel tree. This has no platform-specific code but can use any device whose kernel driver is is able to work purely from a device tree node. We use this to instantiate a minimal set of devices: a GIC and some virtio-mmio transports. Signed-off-by: John Rigby <john.rigby@linaro.org> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Message-id: 1385140638-10444-8-git-send-email-peter.maydell@linaro.org [PMM: Significantly overhauled: * renamed user-facing machine to just "virt" * removed the A9 support (it can't work since the A9 has no generic timers) * added virtio-mmio transports instead of random set of 'soc' devices (though we retain a pl011 UART) * instead of updating io_base as we step through adding devices, define a memory map with an array (similar to vexpress) * similarly, define irqmap with an array * folded in some minor fixes from John's aarch64-support patch * rather than explicitly doing endian-swapping on FDT cells, use fdt APIs that let us just pass in host-endian values and let the fdt layer take care of the swapping * miscellaneous minor code cleanups and style fixes ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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