diff options
| author | Sriram Yagnaraman <sriram.yagnaraman@est.tech> | 2023-03-24 16:34:57 +0100 |
|---|---|---|
| committer | Jason Wang <jasowang@redhat.com> | 2023-03-28 13:10:55 +0800 |
| commit | 3269ebb3e0fe0e356199c2dcc24c51ad63865aa4 (patch) | |
| tree | 5f41b68f67150aed1ec834098ed2335b0cd900a2 /hw/net/igb_core.h | |
| parent | 1c1e649761a20e92053cbec81c2947ca82258ef7 (diff) | |
| download | focaccia-qemu-3269ebb3e0fe0e356199c2dcc24c51ad63865aa4.tar.gz focaccia-qemu-3269ebb3e0fe0e356199c2dcc24c51ad63865aa4.zip | |
igb: implement VFRE and VFTE registers
Also introduce: - Checks for RXDCTL/TXDCTL queue enable bits - IGB_NUM_VM_POOLS enum (Sec 1.5: Table 1-7) Signed-off-by: Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by: Jason Wang <jasowang@redhat.com>
Diffstat (limited to 'hw/net/igb_core.h')
| -rw-r--r-- | hw/net/igb_core.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/net/igb_core.h b/hw/net/igb_core.h index 8914e0b801..9cbbfd516b 100644 --- a/hw/net/igb_core.h +++ b/hw/net/igb_core.h @@ -47,6 +47,7 @@ #define IGB_MSIX_VEC_NUM (10) #define IGBVF_MSIX_VEC_NUM (3) #define IGB_NUM_QUEUES (16) +#define IGB_NUM_VM_POOLS (8) typedef struct IGBCore IGBCore; |