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| author | Nicholas Piggin <npiggin@gmail.com> | 2023-06-26 06:16:28 +1000 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2023-07-07 04:18:26 -0300 |
| commit | bc65beb3a412b3d6d7e16d9f11a9712a086aae02 (patch) | |
| tree | 882a8519f5b249484299e6bac6b56b8ad0afb6fc /hw/net/trace-events | |
| parent | b25f2ffa19c0f4a79de0315d4eade36ce76b031c (diff) | |
| download | focaccia-qemu-bc65beb3a412b3d6d7e16d9f11a9712a086aae02.tar.gz focaccia-qemu-bc65beb3a412b3d6d7e16d9f11a9712a086aae02.zip | |
sungem: Add WOL MMIO
Apple sungem devices are expected to have WOL MMIO registers. Add a region to prevent transaction failures, and implement the WOL-disable CSR write because the Linux driver reset writes this. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-ID: <20230625201628.65231-1-npiggin@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'hw/net/trace-events')
| -rw-r--r-- | hw/net/trace-events | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/net/trace-events b/hw/net/trace-events index e4a98b2c7d..930e5b4293 100644 --- a/hw/net/trace-events +++ b/hw/net/trace-events @@ -350,6 +350,8 @@ sungem_mmio_txdma_write(uint64_t addr, uint64_t val) "MMIO txdma write to 0x%"PR sungem_mmio_txdma_read(uint64_t addr, uint64_t val) "MMIO txdma read from 0x%"PRIx64" val=0x%"PRIx64 sungem_mmio_rxdma_write(uint64_t addr, uint64_t val) "MMIO rxdma write to 0x%"PRIx64" val=0x%"PRIx64 sungem_mmio_rxdma_read(uint64_t addr, uint64_t val) "MMIO rxdma read from 0x%"PRIx64" val=0x%"PRIx64 +sungem_mmio_wol_write(uint64_t addr, uint64_t val) "MMIO wol write to 0x%"PRIx64" val=0x%"PRIx64 +sungem_mmio_wol_read(uint64_t addr, uint64_t val) "MMIO wol read from 0x%"PRIx64" val=0x%"PRIx64 sungem_mmio_mac_write(uint64_t addr, uint64_t val) "MMIO mac write to 0x%"PRIx64" val=0x%"PRIx64 sungem_mmio_mac_read(uint64_t addr, uint64_t val) "MMIO mac read from 0x%"PRIx64" val=0x%"PRIx64 sungem_mmio_mif_write(uint64_t addr, uint64_t val) "MMIO mif write to 0x%"PRIx64" val=0x%"PRIx64 |