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| author | Taylor Simpson <tsimpson@quicinc.com> | 2022-02-09 18:15:56 -0800 |
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| committer | Taylor Simpson <tsimpson@quicinc.com> | 2022-03-12 09:14:22 -0800 |
| commit | c0d86060f033fc8d591b0163e380ff6cd04f213a (patch) | |
| tree | 2cdcbf0c3bc5425e35458d995a8362a112e23db3 /hw/net/virtio-net.c | |
| parent | 3977ba3078503fca0f182aa8a39fad2388f43cb1 (diff) | |
| download | focaccia-qemu-c0d86060f033fc8d591b0163e380ff6cd04f213a.tar.gz focaccia-qemu-c0d86060f033fc8d591b0163e380ff6cd04f213a.zip | |
Hexagon (target/hexagon) assignment to c4 should wait until packet commit
On Hexagon, c4 is an alias for predicate registers P3:0. If we assign to c4 inside a packet with reads from predicate registers, the predicate reads should get the old values. Test case added to tests/tcg/hexagon/preg_alias.c Co-authored-by: Michael Lambert <mlambert@cuicinc.com> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20220210021556.9217-13-tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/net/virtio-net.c')
0 files changed, 0 insertions, 0 deletions