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| author | Amadeusz Sławiński <amade@asmblr.net> | 2013-02-21 07:34:11 +0000 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2013-03-08 21:04:53 +0100 |
| commit | 987422bc4a4c6366ca6a7fbfa38a9920fd7ada2f (patch) | |
| tree | bd74c61b98681253bb0d781e190a2537ead3332d /hw/omap_uart.c | |
| parent | e13da40448fabb0829d75b01dc57da5f44f391b3 (diff) | |
| download | focaccia-qemu-987422bc4a4c6366ca6a7fbfa38a9920fd7ada2f.tar.gz focaccia-qemu-987422bc4a4c6366ca6a7fbfa38a9920fd7ada2f.zip | |
PPC: xnu kernel expects FLUSH to be cleared on STOP
otherwise it gets stuck in a loop
so clear it when unsetting run when flush is set
void
IODBDMAStop( volatile IODBDMAChannelRegisters *registers)
{
IOSetDBDMAChannelControl( registers,
IOClearDBDMAChannelControlBits( kdbdmaRun )
| IOSetDBDMAChannelControlBits( kdbdmaFlush ));
DBDMA: writel 0x0000000000000b00 <= 0xa0002000
DBDMA: channel 0x16 reg 0x0
DBDMA: status 0x00002000
while( IOGetDBDMAChannelStatus( registers) & (
kdbdmaActive | kdbdmaFlush))
eieio();
DBDMA: readl 0x0000000000000b04 => 0x00002000
DBDMA: channel 0x16 reg 0x1
DBDMA: readl 0x0000000000000b04 => 0x00002000
DBDMA: channel 0x16 reg 0x1
DBDMA: readl 0x0000000000000b04 => 0x00002000
DBDMA: channel 0x16 reg 0x1
DBDMA: readl 0x0000000000000b04 => 0x00002000
DBDMA: channel 0x16 reg 0x1
it continues to get printed
}
Signed-off-by: Amadeusz Sławiński <amade@asmblr.net>
[agraf: replace tabs with spaces]
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw/omap_uart.c')
0 files changed, 0 insertions, 0 deletions