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authorBlue Swirl <blauwirbel@gmail.com>2010-06-19 07:41:43 +0000
committerBlue Swirl <blauwirbel@gmail.com>2010-06-19 07:41:43 +0000
commit9605111958173938ac08298f515d55e937d0211c (patch)
tree10235928dfca2255871dfaaf5117d1003a3fd45f /hw/pc_piix.c
parent7d0500c49abe09171260a4a8dd06c312c3e043e9 (diff)
downloadfocaccia-qemu-9605111958173938ac08298f515d55e937d0211c.tar.gz
focaccia-qemu-9605111958173938ac08298f515d55e937d0211c.zip
ioapic: convert to qdev
Convert to qdev.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/pc_piix.c')
-rw-r--r--hw/pc_piix.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/hw/pc_piix.c b/hw/pc_piix.c
index dc46846923..68040b7394 100644
--- a/hw/pc_piix.c
+++ b/hw/pc_piix.c
@@ -33,6 +33,7 @@
 #include "ide.h"
 #include "kvm.h"
 #include "sysemu.h"
+#include "sysbus.h"
 
 #define MAX_IDE_BUS 2
 
@@ -40,6 +41,22 @@ static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
 
+static void ioapic_init(IsaIrqState *isa_irq_state)
+{
+    DeviceState *dev;
+    SysBusDevice *d;
+    unsigned int i;
+
+    dev = qdev_create(NULL, "ioapic");
+    qdev_init_nofail(dev);
+    d = sysbus_from_qdev(dev);
+    sysbus_mmio_map(d, 0, 0xfec00000);
+
+    for (i = 0; i < IOAPIC_NUM_PINS; i++) {
+        isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i);
+    }
+}
+
 /* PC hardware initialisation */
 static void pc_init1(ram_addr_t ram_size,
                      const char *boot_device,
@@ -77,7 +94,7 @@ static void pc_init1(ram_addr_t ram_size,
     isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
     isa_irq_state->i8259 = i8259;
     if (pci_enabled) {
-        isa_irq_state->ioapic = ioapic_init();
+        ioapic_init(isa_irq_state);
     }
     isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);