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| author | Peter Maydell <peter.maydell@linaro.org> | 2019-07-12 17:34:13 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-07-12 17:34:13 +0100 |
| commit | 46cd24e7ed38191b5ab5c40a836d6c5b6b604f8a (patch) | |
| tree | cc46f2029433dce9ee655cdb5b5fb5fdb946db9b /hw/pci-bridge | |
| parent | 1316b1ddc8a05e418c8134243f8bff8cccbbccb1 (diff) | |
| parent | 207efa18ac9eb7085a44cad24489d0da54bc5f65 (diff) | |
| download | focaccia-qemu-46cd24e7ed38191b5ab5c40a836d6c5b6b604f8a.tar.gz focaccia-qemu-46cd24e7ed38191b5ab5c40a836d6c5b6b604f8a.zip | |
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
virtio, pc, pci: fixes, cleanups, tests A bunch of fixes all over the place. ACPI tests will now run on more systems: might introduce new failure reports but that's for the best, isn't it? Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Fri 12 Jul 2019 15:57:40 BST # gpg: using RSA key 281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: virtio pmem: remove transitional names virtio pmem: remove memdev null check virtio pmem: fix wrong mem region condition tests: acpi: do not skip tests when IASL is not installed tests: acpi: do not require IASL for dumping AML blobs virtio-balloon: fix QEMU 4.0 config size migration incompatibility pcie: consistent names for function args xio3130_downstream: typo fix Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/pci-bridge')
| -rw-r--r-- | hw/pci-bridge/xio3130_downstream.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_downstream.c index 899b0fd6c9..182e164f74 100644 --- a/hw/pci-bridge/xio3130_downstream.c +++ b/hw/pci-bridge/xio3130_downstream.c @@ -43,7 +43,7 @@ static void xio3130_downstream_write_config(PCIDevice *d, uint32_t address, { uint16_t slt_ctl, slt_sta; - pcie_cap_slot_get(d, &slt_sta, &slt_ctl); + pcie_cap_slot_get(d, &slt_ctl, &slt_sta); pci_bridge_write_config(d, address, val, len); pcie_cap_flr_write_config(d, address, val, len); pcie_cap_slot_write_config(d, slt_ctl, slt_sta, address, val, len); |